UNITED STATES
SECURITIES AND EXCHANGE COMMISSION

Washington, DC 20549

 

 

FORM 8-K

 

CURRENT REPORT
Pursuant to Section 13 or 15(d) of
the Securities Exchange Act of 1934

 

March 22, 2004

Date of Report (date of earliest event reported)

 

 

Lattice Semiconductor Corporation

(Exact name of Registrant as specified in its charter)

 

 

5555 N. E. Moore Court
Hillsboro, Oregon 97124-6421

(Address of principal executive offices)

 

(503) 268-8000

(Registrant’s telephone number, including area code)

 

 

(Former name or former address, if changed since last report)

 

 

Item 5.    Other Events and Regulation FD Disclosure.

 

On March 22, 2004, Lattice Semiconductor Corporation (“Lattice” or the “Company”) announced that Fujitsu Limited (“Fujitsu”) has agreed to manufacture Lattice’s next generation FPGA products on its 130-nanometer (nm) and 90-nanometer CMOS process technologies, as well as on a 130-nm technology with embedded Flash memory being jointly developed by Fujitsu and the Company.

 

Additionally, in an effort to secure a long-term, stable advanced technology wafer supply, the Company announced plans to invest between $100 million to $200 million in Fujitsu’s new 300mm wafer fab, scheduled for operation in Spring 2005.  Presently, the Company contemplates making this investment in stages before the end of 2005 and structuring the investment as an advance payment for production wafers and for access to future process technologies. Lattice expects that the detailed terms of the investment will be finalized within the next 90 days.

 

The foregoing paragraphs contain forward-looking statements within the meaning of the federal securities laws including statements relating to the manufacture of the Company’s next generation FPGA products, the joint development efforts of Fujitsu and the Company, the terms and the timing of the Company’s planned investment in Fujitsu’s new wafer fab and the scheduled date for the commencement of operations at Fujitsu’s new wafer fab.  Investors are cautioned that actual events and results could differ materially from these statements as a result of a number of factors, including technological and product development risks, the ability of Lattice and Fujitsu to reach agreement on the planned investment on the terms and within the timeframe contemplated above, the ability of Fujitsu to commence operations at its new wafer fab in Spring 2005 and become a long-term and stable source of wafer supply for the Company, and other risk factors detailed in the Company’s filings with the Securities and Exchange Commission.

 

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SIGNATURES

 

Pursuant to the requirements of the Securities Exchange Act of 1934, the Registrant has duly caused this Report to be signed on its behalf by the undersigned hereunto duly authorized.

 

		LATTICE SEMICONDUCTOR CORPORATION
	By:	/s/ Jan Johannessen
		Jan Johannessen Corporate Vice President and Chief Financial Officer

 

Date: March 24, 2004

 

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